The CAEN V2495 is not a traditional programmable logic controller but rather a general-purpose programmable FPGA and I/O unit housed in a 1-unit wide VME 6U module. It is engineered for applications that demand user-defined digital logic, including coincidence detection, trigger logic implementation, gate and delay generation, and input/output register management. Built around an Altera Cyclone V 5CGXC4 User FPGA with 50,000 logic elements, the V2495 places complete control of the hardware logic directly in the hands of the user, enabling custom firmware development for highly specialized applications in nuclear physics, particle accelerator experiments, and advanced test systems.

The V2495 employs a dual-FPGA architecture to separate system management from user functionality. The Main FPGA (Altera Cyclone V E) handles all communication interfaces, including the VME64X bus and USB 2.0 connection, and manages the proprietary 16-bit local bus connection to the User FPGA. The User FPGA (Altera Cyclone V GX) is dedicated entirely to the user's application logic and is directly interfaced to the front panel I/O ports. A dedicated external flash memory stores multiple firmware images that can be loaded onto the User FPGA, and a JTAG connector allows for on-the-fly programming during firmware prototyping and debugging. Free software tools are provided by CAEN to upload custom firmware via either the VME bus or the front panel Mini-USB connector.

I/O flexibility is a cornerstone of the V2495 design. The base module provides 64 differential LVDS/ECL/PECL inputs across sections A and B, and 32 differential LVDS outputs on section C, with bandwidths of 200 MHz and 250 MHz respectively. Three independent mezzanine expansion slots allow the channel interface to be freely expanded using A395x-series piggyback boards. Five board types are available: A395A (32 LVDS/ECL/PECL inputs), A395B (32 LVDS outputs), A395C (32 ECL outputs with 300 MHz bandwidth), A395D (8 NIM/TTL selectable I/O), and A395E (8 analog outputs with 16-bit resolution). With a full complement of mezzanine cards, the V2495 can achieve a maximum configuration of 194 I/O channels. A dedicated Gate and Delay Generator, implemented in a Xilinx Spartan-6 FPGA, provides 32 independent programmable channels capable of generating delayed and gated signals from 9.6 ns up to 701 μs, with a maximum channel-to-channel spread of 20%.

The V2495 is fully compliant with the VME64X standard, supporting A24 and A32 addressing spaces, D16, D32, and BLT32 data transfer modes, as well as geographical addressing and multicast commands (VX2495 variant). A desktop version, the DT5495, is available for benchtop applications. Example firmware, such as the FW2495SC scaler firmware, transforms the V2495 into a multievent latching scaler housing up to 160 independent counting channels with 200 MHz counting frequency and 32- or 64-bit programmable counting depth. This combination of user-customizable FPGA logic, extensive I/O expandability, and precision timing generation makes the V2495 an ideal core for experimental physics trigger systems, nuclear instrumentation, and any application requiring high-speed, reconfigurable digital logic.

Technical Specifications